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View Resource Lab 1 - Introduction to Quartus II

This lab activity from the Digital Logic Project is designed to familiarize students with using many of the common aspects of the Quartus II software for digital logic design. Students will create a new project, create a new vhdl file, use the MegaWizard Plug-In Manager, compile the design, plan and manage I/O assignments, apply timing analysis using the TimeQuest Timing Analyzer, write Synopsys...

View Resource MTU MICUP Program and Industrial Technology Recruitment Efforts

This presentation reviews an ongoing community college outreach/recruiting initiative, MICUP delivered at MTU, Houghton Michigan, outlines a BS degree in Industrial Technology program designed for community college transfer students with an AS in approved technical disciplines, and reviews future recruitment and retention initiatives. MICUP is the Michigan College/University Partnership Program,...

View Resource Lab 2 - Introduction to VHDL

In this lab activity from the Digital Logic Project, students design, test, and simulate a basic logic circuit using the Quartus II development software. The circuit created is a ripple-carry four-bit adder/subtractor using both behavioral and structural VHDL coding.

View Resource Lab 3 - Advanced VHDL

This lab activity from the Digital Logic Project demonstrates many advanced VHDL techniques and how they can be used to your advantage to create efficient VHDL code. Topics include operator balancing, resource sharing, preventing unwanted latches, and state machine encoding schemes.

View Resource Lab 5 - A VHDL Reaction Timer

This lab activity from the Digital Logic Project combines many advanced VHDL techniques including timers, seven segment display drivers, packages and functions, and state machines to create a simple game that tests a person’s reaction time.

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